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  2-13 features ? fax and modem interface (v29) ? variants available with different line impedances ? provides reinforced barrier to international ptt requirements ? transformerless 2-4 wire conversion. ? integral loop switch ? dial pulse and dtmf operation ? line state detection outputs ? loop current/ringing outputs ? single +5v operation, low on-hook power (5mw) ? full duplex data transmission applications interface to central office or pabx line for: ? modem ? fax ? telemetry description the zarlink MH88422 data access arrangement (d.a.a.) provides a complete interface between data transmission equipment and a telephone line. all functions are integrated into a single thick film hybrid module which provides high voltage isolation, very high reliability and optimum circuit design needing a minimum of external components. a number of variants are available to meet particular country impedance requirements. the d.a.a. has been designed to meet regulatory approvals requirements in these countries. figure 1 - functional block diagram opto- isolation logic input buffer opto- isolation opto- isolation opto- isolation audio buffer audio buffer buffer transhybrid loss cancellation circuit isolation barrier vdd agnd lc vr vx rvlc tip ring user connections network connections input buffer & txin tf rls ring & loop line termination ds5067 issue 11 november 2001 ordering informations MH88422-2 26 pin dil package 0 c to 70 c MH88422 dataaccessarrangement preliminary information
MH88422 preliminary information 2-14 figure 2 - pin connections pin description pin # name description 1 vdd positive supply voltage. +5v. 2, 4, 6, 8, 9 ic internal connection. this pin is cropped short. 3 agnd analog ground. 4-wire ground. normally connected to system ground. 5 lc loop control (input). a logic 0 activates internal circuitry which provides a line termination across tip and ring. used for seizing the line and dial pulsing. 7 rvlc ringing voltage and current detect (output). indicates the status of loop current and ringing voltage. 10, 12 np no pin fitted. 11 vx transmit (output). analog output to modem/fax chip set. 13 vr receive (input). analog input to modem/fax chip set. 14, 17 ic internal connection. this pin is cropped short. 15, 19 np no pin fitted. 16 ring ring lead . connects to the "ring" lead of a telephone line. 18 txin dummy ringer connection. connects to the "ring" lead of a telephone line through a dummy ringer capacitor. 20 tf tip feed. connects externally to the rls pin. 21 ic/np no pin fitted. 23 np internal connection . this pin is cropped short. 24 rls ringing loop sense. connects externally to the tf pin. 25 ic internal connection. this pin is cropped short. 26 tip tip lead. connects to the "tip" lead of a telephone line. vdd ic agnd ic lc ic rvlc ic ic/np vx ic/np ic 1 2 3 4 5 6 7 8 9 10 11 12 15 16 17 18 26 25 24 23 22 21 20 19 13 14 vr tip ic rls ic/np ic ic/np tf np ic ring np txin ic
preliminary information MH88422 2-15 functional description the device is a data access arrangement (d.a.a.). it is used to correctly terminate a 2-wire analog loop. it provides a signalling link and a 2-4 wire line interface between an analog loop and the subscriber?s data transmission equipment such as modems, facsimiles (fax?s), remote metering and electronic point of sale equipment (epos). isolation barrier the device provides an isolation barrier implemented by using optocouplers. this is a reinforced barrier for an instantaneous power surge of up to 3kv r.m.s . , for example a lightning strike. it also provides full isolation for a continuous ac voltage level of up to 250v r.m.s. external protection circuit should the input voltage from the line exceed that isolated by the optocoupler, an external protection circuit assists in preventing damage to the device and the subscriber equipment. see figure 3. line termination when loop control ( lc ) is at a logic 0, a line termination is applied across tip and ring. the device can be considered off-hook and dc loop current will flow. the line termination consists of both a dc line termination and an ac input impedance. when lc is at a logic 1, a dummy ringer is applied across tip and ring. the device can be considered on-hook and negligible dc current will flow. the dummy ringer is an ac load, which represents a telephone?s mechanical ringer. dc line termination when lc is at a logic 0, an active termination is applied across tip and ring, at which time it can be considered to be in an off-hook state. this is used to terminate an incoming call, seize the line for an outgoing call, or if it is applied and disconnected at the required rate, can be used to generate dial pulses. this termination resembles approximately 300 w resistance, which is loop current dependent. input impedance the MH88422 has its own fixed tip-ring ac input impedance (zin). also shown are the countries whose ptt requirements match the impedances. MH88422-2 zin = 600 w north america this country passes equipment approved to ctr21. the MH88422 will not meet this specification. see the mh88437 datasheet for a ctr21 product. dummy ringer this device supports a dummy ringer option which can be configured by the inclusion of external components. further details relating to component values and configuration can be obtained from msan-154. for example, figure 3 shows capacitor c2 which if set to 1.8 m f would meet the new zealand dummy ringer requirements. 2-4 wire conversion the device converts the balanced 2-wire input, presented by the line at tip and ring, to a ground referenced signal at vx, as required by modem/fax chip sets. conversely the device converts the ground referenced signal input at vr, to a balanced 2-wire signal across tip and ring. during full duplex transmission, the signal at tip and ring consists of both the signal from the device to the line and the signal from the line to the device. the signal input at vr, being sent to the line, must not appear at the output vx. in order to prevent this, the device has an internal cancellation circuit. the measure of attenuation is transhybrid loss (thl). the transmit (vx) and receive (vr) signals are ground referenced (agnd), and biased to 2.5v. the device must be in the off-hook condition for transmission or reception to take place. transmit gain the transmit gain of the MH88422 is the gain from the differential signal across tip and ring to the ground referenced signal at vx. the internal transmit gain of the device is fixed and depends on the variant as shown in the ac electrical characteristics table.
MH88422 preliminary information 2-16 for the correct gain, the input impedance of the MH88422 variant used, must match the specified line impedance. by adding an external potential divider to vx, it is possible to reduce the overall gain in the application. the output impedance of vx is approximately 10 w and the minimum resistance from vx to ground should be 2k w . example: if r1 = r2 = 2k w, in figure 3, the gain would reduce by 6.0db. receive gain the receive gain of the MH88422 is the gain from the ground referenced signal at vr to the differential signal across tip and ring. the internal receive gain of the device is fixed as shown in the ac electrical characteristics table. for the correct gain, the input impedance of the MH88422 variant used, must match the specified line impedance. the input impedance to ground of vr is 47k w and this can be used with an external series resistor to form a potential divider and reduce the overall gain in the application. example: if r3 = 100k w , in figure 3, the gain would reduce by 3.0db. supervisory features the device is capable of monitoring the line conditions across tip and ring, this is shown in figure 3. the ringing voltage loop current detect pin ( rvlc ), indicates the status of the device. the rvlc output is at logic 0 when loop current flows, indicating that the MH88422 is in an off hook state. when the device is generating dial pulses, the rvlc pin outputs a ttl pulse at the same rate. an ac ringing voltage across tip and ring will cause rvlc to output a ttl pulse at double the ringing frequency with an envelope determined by the ringing cadence. mechanical data see figure 10, for details of the mechanical specification. figure 3 - typical application circuit tip rls tf txin ring vx vr rvlc lc agnd vdd tip ring c1 +5v 1 3 5 7 11 13 16 18 20 24 26 audio input audio ring voltage & loop current detect output loop control input MH88422 + r1 r2 r3 protection circuit output c3 c4 c2 notes: 1) r1, r2: transmit gain resistors 2) r3: receive gain resistor 3) c1: 10 m f 6v tantalum 4) c2: dummy ringer capacitor 250v 5) c3, c4: 10 m f ac coupling capacitors
preliminary information MH88422 2-17 . *exceeding these values may cause permanent damage. functional operation under these conditions is not implied. ? typical figures are at 25c with nominal +5v supply and are for design aid only ? electrical characteristics are over recommended operating conditions unless otherwise stated. ?typical figures are at 25 c with nominal + 5v supplies and are for design aid only. note 1: refer to ftz 1tr2 section 2.2 note 2: refer to eia/tia 464 section 4.1.1.4.4 note 3: refer to bs6305 section 4.3.1 note 4: refer to zv5 annex 1 absolute maximum ratings* - all voltages are with respect to agnd unless otherwise specified. parameter symbol min max units 1 dc supply voltage v dd -0.3 6 v 2 storage temperature t s -55 +125 c 3 dc loop voltage v bat -110 +110 v 4 ringing voltage v r - 150 vrms 5 loop current i loop - 90 ma recommended operating conditions parameter sym min typ ? max units test conditions 1 dc supply voltages v dd 4.75 5.0 5.25 v 2 operating temperatures t op 0 25 70 c 3 ringing voltage v r 75 90 vrms 150 vrms for -2 variant loop electrical characteristics ? characteristics sym min typ ? max units test conditions 1 no detect detect 14 7 vrms vrms externally adjustable - see msan-154 2 ringing frequency 15 68 hz 3 operating loop current 15 80 ma 4 off-hook dc voltage 2.4 3.1 6.0 6.0 7.8 v v v i loop =15ma i loop =20ma (see note 2) i loop =26ma 5 leakage current (tip or ring to agnd) 10 m a 100v dc 6 leakage current on-hook (tip to ring) 9 10 ma v bat = -50v 7 dc resistance during dialling 260 280 w 8 dial pulse distortion on off 0 0 +2 +2 +4 +4 ms ms
MH88422 preliminary information 2-18 ? electrical characteristics are over recommended operating conditions unless otherwise stated. ?typical figures are at 25 c with nominal + 5v supplies and are for design aid only. dc electrical characteristics ? characteristics sym min typ ? max units test conditions 1 supply current i dd 1 5 ma v dd = 5.0v, on-hook 2 rvlc low level output voltage high level output voltage v ol v oh 2.4 0.4 v v i ol = 4ma i oh = 0.4ma 3 lc low level input voltage high level input voltage low level input current high level input current v il v ih i il i ih 2.0 0.8 -60 60 v v m a m a v il = 0.0v v ih = 5.0v ac electrical characteristics ? - MH88422-2 characteristics sym min typ ? max units test conditions 1 return loss at 2-wire (reference 600 w ) erl sfrl 20 14 30 19 db db test circuit as fig 7 500-2500hz 200-3200hz 2 longitudinal to metallic balance metallic to longitudinal balance 58 53 60 40 60 55 db db db db test circuit as fig 8 200-1000hz 1000-3000hz test circuit as fig 9 200-1000hz 1000-4000hz 3 idle channel noise at 2-wire at vx nc 13 13 20 20 dbrnc dbrnc 4 transmit gain (2-wire to vx) -1.4 -0.4 0.9 db test circuit as fig 5 input 0.5v @ 1khz off- hook 5 frequency response gain (relative to gain @ 1khz) -1.6 -2.1 -1.3 -0.5 0.4 0.9 db db 200hz 3400hz 6 input impedance vr 47k w 7 output impedance at vx 10 w 8 receive gain (vr to 2-wire) 2.5 3.5 4.6 db test circuit as fig 6 input 0.5v at 1khz 9 frequency response gain (relative to gain @ 1khz) -1 -1 0 0 +1 +1 db db 300hz 3400hz 10 signal output overload level at 2-wire at vx +2.0 +2.0 +3.0 +3.0 dbm dbm thd < 5% @1khz i loop = 20 to 40ma 11 total harmonic distortion at 2-wire at vx thd 1.2 1.2 2.5 2.0 % % input -3.5dbm at 1khz
preliminary information MH88422 2-19 ? electrical characteristics are over recommended operating conditions unless otherwise stated. ? typical figures are at 25c with nominal +5v supply and are for design aid only note 1: all of the above test conditions use a test source impedance which matches the device?s impedance. note 2: dbm is referenced to 600 w unless otherwise stated. figure 4 - test circuit 1 figure 5 - test circuit 2 7 power supply rejection ratio at 2-wire at vx psrr 12 12 20 20 db db ripple 0.1 vrms 1khz 8 transhybrid loss thl 6 20 db test cicuit as fig 6 input -3.5dbm, 300-3400hz at v r ac electrical characteristics ? - MH88422-2 dut +5 v 1 3 5 7 9 11 13 14 16 18 20 22 24 26 i loop vdd agnd lc/ rvlc/ ic vx vr tip rls ic tf txin ring nc 1uf 470nf dut +5v 1 3 5 9 9 11 13 14 16 20 20 22 24 26 vdd agnd lc/ rvlc/ nc vx vr tip rls ic tf txin ring ic 1uf vs i=20ma 10h 500 w 100uf 10h 500 w 470nf + 100uf + gain = 20 * log (vx / vs) impedance = zin -v v
MH88422 preliminary information 2-20 figure 6 - test circuit 3 figure 7 - test circuit dut +5v 1 3 5 7 9 11 13 14 16 18 20 22 24 26 vdd agnd lc/ rvlc/ nc vx vr tip rls ic tf txin ring nc 1uf 100uf 470nf z in 10h 500 w -v i=20ma 10h 500 w 100uf + + vs gain = 20 * log (v(zin) / vs) v (z in) dut +5v 1 3 5 7 9 11 13 14 16 18 20 22 24 26 vdd agnd lc/ rvlc/ ic vx vr tip rls ic tf txin ring ic 1uf 100uf 470nf -v 10h 500 w i=20ma v1 300 w 300 w vs + 100uf + return loss = 20 x log (v1 / vs) 10h 500 w zin
preliminary information MH88422 2-21 figure 8 - test circuit 5 figure 9 - test circuit 6 dut +5v 1 3 5 7 9 11 13 14 16 18 20 22 24 26 vdd agnd lc/ rvlc/ ic vx vr tip rls ic tf txin ring ic 1uf 100uf 470nf vs 300 w 300 w -v 10h 500 w i=20ma + + 100uf long. to met. balance = 20 * log (v1 / vs) v1 10h 500 w dut +5v 1 3 5 7 9 11 13 14 16 18 20 22 24 26 vdd agnd lc/ rvlc/ ic vx vr tip rls ic tf txin ring ic 1uf 470nf -v 10h 500 w i=20ma 300 w 300 w v1 vs 100uf + 100uf + met. to long. balance = 20 * log (v1 / vs) 10h 500 w 510 w
MH88422 preliminary information 2-22 figure 10 - mechanical data for 26-pin dil hybrid notes: 1.42 max (36.1 max) 0.19 max (4.8 max) 0.10 typ (2.54 typ) 0.020 + 0.005 (0.5 + 0.12) 0.063 max 0.26 + 0.015 (22.9 typ) 0.95 max (24.2 max) 0.90 typ 0.27 max (6.9 max) 0.08 typ (2 typ) 0.20 + 0.01 (5.08 + 0.25) * * 1 * (1.6 max) (6.6 + 0.4) 1) not to scale 2) dimensions in inches. (dimensions in millimetres) 3) pin tolerances are non-accumulative. 4) recommended soldering conditions: wave soldering - max temp at pins 260 c for 10 secs. * dimensions to centre of pin. 5) short-cropped pins. (see pin description)
preliminary information MH88422 2-23 notes:
www.zarlink.com information relating to products and services furnished herein by zarlink semiconductor inc. or its subsidiaries (collectively ?zarlink?) is believed to be reliable. however, zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from t he application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. neither the supply of such information or purchase of product or service conveys any license, either express or implied, u nder patents or other intellectual property rights owned by zarlink or licensed from third parties by zarlink, whatsoever. purchasers of products are also hereby notified that the use of product in certain ways or in combination with zarlink, or non-zarlink furnished goods or services may infringe patents or other intellect ual property rights owned by zarlink. this publication is issued to provide information only and (unless agreed by zarlink in writing) may not be used, applied or re produced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. the products, t heir specifications, services and other information appearing in this publication are subject to change by zarlink without notice. no warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is the user?s responsibility t o fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not b een superseded. manufacturing does not necessarily include testing of all functions or parameters. these products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. all products and materials are sold and services provided subject to zarlink?s conditi ons of sale which are available on request. purchase of zarlink?s i 2 c components conveys a licence under the philips i 2 c patent rights to use these components in and i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. zarlink, zl and the zarlink semiconductor logo are trademarks of zarlink semiconductor inc. copyright zarlink semiconductor inc. all rights reserved. technical documentation - not for resale for more information about all zarlink products visit our web site at


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